UltiEVC is an enhanced, fully configurable Video Controller FPGA IP core which can be used to implement versatile and powerfull display control, graphics and video applications.
The IP Library is based around the industry standard AMBA® bus architecture, allowing easy interface of the UltiEVC optimized on Altera® CV SoC device.
The UltiEVC is a field-proven IP core able to drive all TFT panels from different vendors.
The UltiEVC is a compact design optimized for cost-sensitive applications.
Altera® CV SoC Linux Video Frame buffer
Exor JMobile platform compatible.
- Supports Altera® Cyclone™ V and CV SoC devices
- AMBA® 3 AXI Master interfaces and AMBA® 3 APB™ Slave interfaces for registers Configurable design in terms of Logic Modules consumption and functionality
- Supports Active matrix display refresh (TFT, Plasma, AMOLED)
- Display power-up sequence control
- 32x32 to 8192x4096 display pixels resolution, up to 16,777,216 colors
- 8,16 or 24 bit Data output Multiple frame buffers. Internal pixel clock generator. RGB8, RGB16, RGB32, ARGB32 frame buffer formats
- Multi-layer window and overlay image assembly
- Variable frame buffer geometry per layer standard overlay with color-key transparency
- Alpha blending with per-layer fading and Alpha mask layer support
- Supports backlight control and dimming